Monday, June 6, 2022

20-Meter High Performance Direct Conversion Receiver (4)

Link to schematic

I simulated the oscillator in LTSPICE in order to get an idea of the expected voltage amplitudes.
The LTSPICE simulation schematic is shown below. 


The inductor is a tapped coil made from a T37-6 core. 12 turns for L1, 7 turns for L2.  The coils are coupled at unity using the K1... SPICE command line.  V1, the 9V power, is turned on using the 1 us ramp up.  I originally tried the simulation with a simple DC source for V1, but the initial solution wouldn't converge. 

After the transient oscillator startup, the plot of oscillator waveforms is shown below. 

The oscillator frequency is 14.88 MHz, so there is some stray capacitance in the actual circuit that isn't included in the simulation.  This stray capacitance would bring the frequency down into the 20 meter band.  

  1. The top trace is Vtank, which is take at the C2.  The voltage is 16V pk-pk. 
  2. The center trace shows the the JFET gate voltage.  This is about 13 volts pk-pk, and is limited at the high end by forward biasing of D1.  I haven't checked,  but D1 probably cuts in before the gate-source junction of J1, so D1 protect the transistor junction from being forward biased. The bottom voltage is limited by the cutoff voltage of the transistor. 
  3. The bottom trace shows the  voltage at the JFET source, which is the output of the oscillator that is coupled into the mixer.  This voltage is 6V pk-pk, which works out to 2.1V rms. This rms voltage is given as 2V rms in the original article,  which indicates the simulation is realistic.  
As discussed in the previous post.  The actual voltage here in the unit I'm working on is 0.87 volts.   So the oscillator appears to be a sick little puppy.  I suspect that the JFET is damages or just a variant far from the normal characteristics for a MPS102...  The MPS102 is infamous for being wildly variable in its characteristics.  I will replace the transistor with a new one and it will probably improve. 

A cross plot of Id as a function of Vgs indicates gm is about 5 mmho for the simulated JFET.

I may try to figure a way to plot the drain characteristic of the actual transistor.  







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